The completed PLD schematic diagram is as follows:įigure 1 draws the PLD schematic diagram, this is a 3-8 decoder PLD file. We use gal16v8 to design a commonly used 38 translator in single chip microcomputer system, and then in Proteus we observe the corresponding relationship between the input and output of the 38 decoder in gal16v8 to complete the circuit simulation of PLD. The general PLD design software can only simulate the timing logic of the PLD chip, while Proteus can simulate the PLD circuit simulation and simulate the actual operation of the designed PLD chip in the circuit. Users can use some development tools to process them, that is, to connect the components in the chip according to the design requirements, so that they can complete the function of a logic circuit or system, and become a programmable logic device ASIC used in actual electronic systems. A large number of basic logic elements such as gates and triggers are integrated on the chip in a certain arrangement. PLD (programmable logic device) is a kind of semi-finished product of digital integrated circuit. In fact, proteus can simulate PLD circuit.
Protel 99se add library to schematic how to#
But now we only pay attention to Proteus Simulation of MCU and how to debug with keil. You can also see the effect of input and output after running. It can be directly programmed on the virtual prototype EDA based on schematic diagram, and realize the real-time debugging of software source level. Compared with other tools, the biggest feature of this software is that it can simulate MCU.
Proteus is a tool software from UK company, which is widely used in the world.
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